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ðŸ“ ..
ðŸ“„ adxintrin.h(2.8 KB)
ðŸ“„ ammintrin.h(3.14 KB)
ðŸ“„ avx2intrin.h(57.26 KB)
ðŸ“„ avx5124fmapsintrin.h(6.38 KB)
ðŸ“„ avx5124vnniwintrin.h(4.16 KB)
ðŸ“„ avx512bitalgintrin.h(8.64 KB)
ðŸ“„ avx512bwintrin.h(99.13 KB)
ðŸ“„ avx512cdintrin.h(5.69 KB)
ðŸ“„ avx512dqintrin.h(83.37 KB)
ðŸ“„ avx512erintrin.h(12.66 KB)
ðŸ“„ avx512fintrin.h(475.38 KB)
ðŸ“„ avx512ifmaintrin.h(3.35 KB)
ðŸ“„ avx512ifmavlintrin.h(5.26 KB)
ðŸ“„ avx512pfintrin.h(10.05 KB)
ðŸ“„ avx512vbmi2intrin.h(19.35 KB)
ðŸ“„ avx512vbmi2vlintrin.h(36.25 KB)
ðŸ“„ avx512vbmiintrin.h(4.81 KB)
ðŸ“„ avx512vbmivlintrin.h(8.17 KB)
ðŸ“„ avx512vlbwintrin.h(140.48 KB)
ðŸ“„ avx512vldqintrin.h(59.88 KB)
ðŸ“„ avx512vlintrin.h(414.04 KB)
ðŸ“„ avx512vnniintrin.h(4.85 KB)
ðŸ“„ avx512vnnivlintrin.h(8.05 KB)
ðŸ“„ avx512vpopcntdqintrin.h(3.04 KB)
ðŸ“„ avx512vpopcntdqvlintrin.h(4.56 KB)
ðŸ“„ avxintrin.h(49.43 KB)
ðŸ“„ bmi2intrin.h(3.31 KB)
ðŸ“„ bmiintrin.h(5.5 KB)
ðŸ“„ bmmintrin.h(1.13 KB)
ðŸ“„ cet.h(2.6 KB)
ðŸ“„ cetintrin.h(3.25 KB)
ðŸ“„ clflushoptintrin.h(1.62 KB)
ðŸ“„ clwbintrin.h(1.55 KB)
ðŸ“„ clzerointrin.h(1.46 KB)
ðŸ“„ cpuid.h(8.72 KB)
ðŸ“„ cross-stdarg.h(2.5 KB)
ðŸ“„ emmintrin.h(49.84 KB)
ðŸ“„ f16cintrin.h(3.33 KB)
ðŸ“„ float.h(16.52 KB)
ðŸ“„ fma4intrin.h(8.92 KB)
ðŸ“„ fmaintrin.h(10.29 KB)
ðŸ“„ fxsrintrin.h(2.06 KB)
ðŸ“„ gcov.h(1.36 KB)
ðŸ“„ gfniintrin.h(14.7 KB)
ðŸ“„ ia32intrin.h(7.69 KB)
ðŸ“„ immintrin.h(5.33 KB)
ðŸ“„ iso646.h(1.24 KB)
ðŸ“„ limits.h(5.95 KB)
ðŸ“„ lwpintrin.h(3.32 KB)
ðŸ“„ lzcntintrin.h(2.34 KB)
ðŸ“„ mm3dnow.h(6.91 KB)
ðŸ“„ mm_malloc.h(1.74 KB)
ðŸ“„ mmintrin.h(30.62 KB)
ðŸ“„ movdirintrin.h(2.29 KB)
ðŸ“„ mwaitxintrin.h(1.71 KB)
ðŸ“„ nmmintrin.h(1.26 KB)
ðŸ“„ omp.h(5.85 KB)
ðŸ“„ openacc.h(4.53 KB)
ðŸ“„ pconfigintrin.h(2.29 KB)
ðŸ“„ pkuintrin.h(1.7 KB)
ðŸ“„ pmmintrin.h(4.27 KB)
ðŸ“„ popcntintrin.h(1.71 KB)
ðŸ“„ prfchwintrin.h(1.41 KB)
ðŸ“„ rdseedintrin.h(1.97 KB)
ðŸ“„ rtmintrin.h(2.67 KB)
ðŸ“ sanitizer
ðŸ“„ sgxintrin.h(6.92 KB)
ðŸ“„ shaintrin.h(3.13 KB)
ðŸ“„ smmintrin.h(27.74 KB)
ðŸ“„ stdalign.h(1.18 KB)
ðŸ“„ stdarg.h(3.98 KB)
ðŸ“„ stdatomic.h(9.1 KB)
ðŸ“„ stdbool.h(1.49 KB)
ðŸ“„ stddef.h(13.81 KB)
ðŸ“„ stdfix.h(5.86 KB)
ðŸ“„ stdint-gcc.h(9.24 KB)
ðŸ“„ stdint.h(328 B)
ðŸ“„ stdnoreturn.h(1.11 KB)
ðŸ“„ syslimits.h(330 B)
ðŸ“„ tbmintrin.h(5.12 KB)
ðŸ“„ tmmintrin.h(8.15 KB)
ðŸ“„ unwind.h(10.65 KB)
ðŸ“„ vaesintrin.h(4.55 KB)
ðŸ“„ varargs.h(139 B)
ðŸ“„ vpclmulqdqintrin.h(3.4 KB)
ðŸ“„ wbnoinvdintrin.h(1.58 KB)
ðŸ“„ wmmintrin.h(4.55 KB)
ðŸ“„ x86intrin.h(2.06 KB)
ðŸ“„ xmmintrin.h(41.22 KB)
ðŸ“„ xopintrin.h(27.9 KB)
ðŸ“„ xsavecintrin.h(1.78 KB)
ðŸ“„ xsaveintrin.h(2.46 KB)
ðŸ“„ xsaveoptintrin.h(1.86 KB)
ðŸ“„ xsavesintrin.h(2.11 KB)
ðŸ“„ xtestintrin.h(1.65 KB)

Editing: gfniintrin.h

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.

GCC is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

Under Section 7 of GPL version 3, you are granted additional
   permissions described in the GCC Runtime Library Exception, version
   3.1, as published by the Free Software Foundation.

You should have received a copy of the GNU General Public License and
   a copy of the GCC Runtime Library Exception along with this program;
   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
   <http://www.gnu.org/licenses/>.  */

#ifndef _IMMINTRIN_H_INCLUDED
#error "Never use <gfniintrin.h> directly; include <immintrin.h> instead."
#endif

#ifndef _GFNIINTRIN_H_INCLUDED
#define _GFNIINTRIN_H_INCLUDED

#if !defined(__GFNI__) || !defined(__SSE2__)
#pragma GCC push_options
#pragma GCC target("gfni,sse2")
#define __DISABLE_GFNI__
#endif /* __GFNI__ */

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_gf2p8mul_epi8 (__m128i __A, __m128i __B)
{
  return (__m128i) __builtin_ia32_vgf2p8mulb_v16qi((__v16qi) __A,
						   (__v16qi) __B);
}

#ifdef __OPTIMIZE__
extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_gf2p8affineinv_epi64_epi8 (__m128i __A, __m128i __B, const int __C)
{
  return (__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi ((__v16qi) __A,
							   (__v16qi) __B,
							    __C);
}

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_gf2p8affine_epi64_epi8 (__m128i __A, __m128i __B, const int __C)
{
  return (__m128i) __builtin_ia32_vgf2p8affineqb_v16qi ((__v16qi) __A,
							(__v16qi) __B, __C);
}
#else
#define _mm_gf2p8affineinv_epi64_epi8(A, B, C)				   \
  ((__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi((__v16qi)(__m128i)(A), \
					   (__v16qi)(__m128i)(B), (int)(C)))
#define _mm_gf2p8affine_epi64_epi8(A, B, C)				   \
  ((__m128i) __builtin_ia32_vgf2p8affineqb_v16qi ((__v16qi)(__m128i)(A),   \
					   (__v16qi)(__m128i)(B), (int)(C)))
#endif

#ifdef __DISABLE_GFNI__
#undef __DISABLE_GFNI__
#pragma GCC pop_options
#endif /* __DISABLE_GFNI__ */

#if !defined(__GFNI__) || !defined(__AVX__)
#pragma GCC push_options
#pragma GCC target("gfni,avx")
#define __DISABLE_GFNIAVX__
#endif /* __GFNIAVX__ */

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_gf2p8mul_epi8 (__m256i __A, __m256i __B)
{
  return (__m256i) __builtin_ia32_vgf2p8mulb_v32qi ((__v32qi) __A,
						    (__v32qi) __B);
}

#ifdef __OPTIMIZE__
extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_gf2p8affineinv_epi64_epi8 (__m256i __A, __m256i __B, const int __C)
{
  return (__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi ((__v32qi) __A,
							   (__v32qi) __B,
							    __C);
}

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_gf2p8affine_epi64_epi8 (__m256i __A, __m256i __B, const int __C)
{
  return (__m256i) __builtin_ia32_vgf2p8affineqb_v32qi ((__v32qi) __A,
							(__v32qi) __B, __C);
}
#else
#define _mm256_gf2p8affineinv_epi64_epi8(A, B, C)			   \
  ((__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi((__v32qi)(__m256i)(A), \
						    (__v32qi)(__m256i)(B), \
						    (int)(C)))
#define _mm256_gf2p8affine_epi64_epi8(A, B, C)				   \
  ((__m256i) __builtin_ia32_vgf2p8affineqb_v32qi ((__v32qi)(__m256i)(A),   \
					(   __v32qi)(__m256i)(B), (int)(C)))
#endif

#ifdef __DISABLE_GFNIAVX__
#undef __DISABLE_GFNIAVX__
#pragma GCC pop_options
#endif /* __GFNIAVX__ */

#if !defined(__GFNI__) || !defined(__AVX512VL__)
#pragma GCC push_options
#pragma GCC target("gfni,avx512vl")
#define __DISABLE_GFNIAVX512VL__
#endif /* __GFNIAVX512VL__ */

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_mask_gf2p8mul_epi8 (__m128i __A, __mmask16 __B, __m128i __C, __m128i __D)
{
  return (__m128i) __builtin_ia32_vgf2p8mulb_v16qi_mask ((__v16qi) __C,
							 (__v16qi) __D,
							 (__v16qi)__A, __B);
}

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_maskz_gf2p8mul_epi8 (__mmask16 __A, __m128i __B, __m128i __C)
{
  return (__m128i) __builtin_ia32_vgf2p8mulb_v16qi_mask ((__v16qi) __B,
			(__v16qi) __C, (__v16qi) _mm_setzero_si128 (), __A);
}

#ifdef __OPTIMIZE__
extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_mask_gf2p8affineinv_epi64_epi8 (__m128i __A, __mmask16 __B, __m128i __C,
				    __m128i __D, const int __E)
{
  return (__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask ((__v16qi) __C,
								(__v16qi) __D,
								 __E,
								(__v16qi)__A,
								 __B);
}

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_maskz_gf2p8affineinv_epi64_epi8 (__mmask16 __A, __m128i __B, __m128i __C,
				     const int __D)
{
  return (__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask ((__v16qi) __B,
						(__v16qi) __C, __D,
						(__v16qi) _mm_setzero_si128 (),
						 __A);
}

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_mask_gf2p8affine_epi64_epi8 (__m128i __A, __mmask16 __B, __m128i __C,
				 __m128i __D, const int __E)
{
  return (__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask ((__v16qi) __C,
					(__v16qi) __D, __E, (__v16qi)__A, __B);
}

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_maskz_gf2p8affine_epi64_epi8 (__mmask16 __A, __m128i __B, __m128i __C,
				  const int __D)
{
  return (__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask ((__v16qi) __B,
		     (__v16qi) __C, __D, (__v16qi) _mm_setzero_si128 (), __A);
}
#else
#define _mm_mask_gf2p8affineinv_epi64_epi8(A, B, C, D, E) 		   \
  ((__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask(		   \
			(__v16qi)(__m128i)(C), (__v16qi)(__m128i)(D),      \
			(int)(E), (__v16qi)(__m128i)(A), (__mmask16)(B)))
#define _mm_maskz_gf2p8affineinv_epi64_epi8(A, B, C, D) \
  ((__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask(		   \
			(__v16qi)(__m128i)(B), (__v16qi)(__m128i)(C),	   \
			(int)(D), (__v16qi)(__m128i) _mm_setzero_si128 (), \
			(__mmask16)(A)))
#define _mm_mask_gf2p8affine_epi64_epi8(A, B, C, D, E) \
  ((__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask((__v16qi)(__m128i)(C),\
      (__v16qi)(__m128i)(D), (int)(E), (__v16qi)(__m128i)(A), (__mmask16)(B)))
#define _mm_maskz_gf2p8affine_epi64_epi8(A, B, C, D)			    \
  ((__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask((__v16qi)(__m128i)(B),\
		(__v16qi)(__m128i)(C), (int)(D),			    \
		(__v16qi)(__m128i) _mm_setzero_si128 (), (__mmask16)(A)))
#endif

#ifdef __DISABLE_GFNIAVX512VL__
#undef __DISABLE_GFNIAVX512VL__
#pragma GCC pop_options
#endif /* __GFNIAVX512VL__ */

#if !defined(__GFNI__) || !defined(__AVX512VL__) || !defined(__AVX512BW__)
#pragma GCC push_options
#pragma GCC target("gfni,avx512vl,avx512bw")
#define __DISABLE_GFNIAVX512VLBW__
#endif /* __GFNIAVX512VLBW__ */

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_gf2p8mul_epi8 (__m256i __A, __mmask32 __B, __m256i __C,
			   __m256i __D)
{
  return (__m256i) __builtin_ia32_vgf2p8mulb_v32qi_mask ((__v32qi) __C,
							 (__v32qi) __D,
							 (__v32qi)__A, __B);
}

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_maskz_gf2p8mul_epi8 (__mmask32 __A, __m256i __B, __m256i __C)
{
  return (__m256i) __builtin_ia32_vgf2p8mulb_v32qi_mask ((__v32qi) __B,
			(__v32qi) __C, (__v32qi) _mm256_setzero_si256 (), __A);
}

#ifdef __OPTIMIZE__
extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_gf2p8affineinv_epi64_epi8 (__m256i __A, __mmask32 __B,
				       __m256i __C, __m256i __D, const int __E)
{
  return (__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask ((__v32qi) __C,
								(__v32qi) __D,
							 	 __E,
								(__v32qi)__A,
								 __B);
}

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_maskz_gf2p8affineinv_epi64_epi8 (__mmask32 __A, __m256i __B,
					__m256i __C, const int __D)
{
  return (__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask ((__v32qi) __B,
				      (__v32qi) __C, __D,
				      (__v32qi) _mm256_setzero_si256 (), __A);
}

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_gf2p8affine_epi64_epi8 (__m256i __A, __mmask32 __B, __m256i __C,
				    __m256i __D, const int __E)
{
  return (__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask ((__v32qi) __C,
							     (__v32qi) __D,
							      __E,
							     (__v32qi)__A,
							      __B);
}

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_maskz_gf2p8affine_epi64_epi8 (__mmask32 __A, __m256i __B,
				     __m256i __C, const int __D)
{
  return (__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask ((__v32qi) __B,
		(__v32qi) __C, __D, (__v32qi)_mm256_setzero_si256 (), __A);
}
#else
#define _mm256_mask_gf2p8affineinv_epi64_epi8(A, B, C, D, E)		\
  ((__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask(		\
	(__v32qi)(__m256i)(C), (__v32qi)(__m256i)(D), (int)(E),		\
	(__v32qi)(__m256i)(A), (__mmask32)(B)))
#define _mm256_maskz_gf2p8affineinv_epi64_epi8(A, B, C, D)		\
  ((__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask(		\
	(__v32qi)(__m256i)(B), (__v32qi)(__m256i)(C), (int)(D),		\
	(__v32qi)(__m256i) _mm256_setzero_si256 (), (__mmask32)(A)))
#define _mm256_mask_gf2p8affine_epi64_epi8(A, B, C, D, E) 		    \
  ((__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask((__v32qi)(__m256i)(C),\
	(__v32qi)(__m256i)(D), (int)(E), (__v32qi)(__m256i)(A), (__mmask32)(B)))
#define _mm256_maskz_gf2p8affine_epi64_epi8(A, B, C, D)			    \
  ((__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask((__v32qi)(__m256i)(B),\
	 (__v32qi)(__m256i)(C), (int)(D),				    \
	 (__v32qi)(__m256i) _mm256_setzero_si256 (), (__mmask32)(A)))
#endif

#ifdef __DISABLE_GFNIAVX512VLBW__
#undef __DISABLE_GFNIAVX512VLBW__
#pragma GCC pop_options
#endif /* __GFNIAVX512VLBW__ */

#if !defined(__GFNI__) || !defined(__AVX512F__) || !defined(__AVX512BW__)
#pragma GCC push_options
#pragma GCC target("gfni,avx512f,avx512bw")
#define __DISABLE_GFNIAVX512FBW__
#endif /* __GFNIAVX512FBW__ */

extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mask_gf2p8mul_epi8 (__m512i __A, __mmask64 __B, __m512i __C,
			   __m512i __D)
{
  return (__m512i) __builtin_ia32_vgf2p8mulb_v64qi_mask ((__v64qi) __C,
					(__v64qi) __D, (__v64qi)__A, __B);
}

extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_maskz_gf2p8mul_epi8 (__mmask64 __A, __m512i __B, __m512i __C)
{
  return (__m512i) __builtin_ia32_vgf2p8mulb_v64qi_mask ((__v64qi) __B,
			(__v64qi) __C, (__v64qi) _mm512_setzero_si512 (), __A);
}
extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_gf2p8mul_epi8 (__m512i __A, __m512i __B)
{
  return (__m512i) __builtin_ia32_vgf2p8mulb_v64qi ((__v64qi) __A,
						    (__v64qi) __B);
}

#ifdef __OPTIMIZE__
extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mask_gf2p8affineinv_epi64_epi8 (__m512i __A, __mmask64 __B, __m512i __C,
				       __m512i __D, const int __E)
{
  return (__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask ((__v64qi) __C,
								(__v64qi) __D,
								 __E,
								(__v64qi)__A,
								 __B);
}

extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_maskz_gf2p8affineinv_epi64_epi8 (__mmask64 __A, __m512i __B,
					__m512i __C, const int __D)
{
  return (__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask ((__v64qi) __B,
				(__v64qi) __C, __D,
				(__v64qi) _mm512_setzero_si512 (), __A);
}

extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_gf2p8affineinv_epi64_epi8 (__m512i __A, __m512i __B, const int __C)
{
  return (__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi ((__v64qi) __A,
							   (__v64qi) __B, __C);
}

extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mask_gf2p8affine_epi64_epi8 (__m512i __A, __mmask64 __B, __m512i __C,
				    __m512i __D, const int __E)
{
  return (__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask ((__v64qi) __C,
					(__v64qi) __D, __E, (__v64qi)__A, __B);
}

extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_maskz_gf2p8affine_epi64_epi8 (__mmask64 __A, __m512i __B, __m512i __C,
				     const int __D)
{
  return (__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask ((__v64qi) __B,
		  (__v64qi) __C, __D, (__v64qi) _mm512_setzero_si512 (), __A);
}
extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_gf2p8affine_epi64_epi8 (__m512i __A, __m512i __B, const int __C)
{
  return (__m512i) __builtin_ia32_vgf2p8affineqb_v64qi ((__v64qi) __A,
							(__v64qi) __B, __C);
}
#else
#define _mm512_mask_gf2p8affineinv_epi64_epi8(A, B, C, D, E) 		\
  ((__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask(		\
	(__v64qi)(__m512i)(C), (__v64qi)(__m512i)(D), (int)(E),		\
	(__v64qi)(__m512i)(A), (__mmask64)(B)))
#define _mm512_maskz_gf2p8affineinv_epi64_epi8(A, B, C, D)		\
  ((__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask(		\
	(__v64qi)(__m512i)(B), (__v64qi)(__m512i)(C), (int)(D),		\
	(__v64qi)(__m512i) _mm512_setzero_si512 (), (__mmask64)(A)))
#define _mm512_gf2p8affineinv_epi64_epi8(A, B, C)			\
  ((__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi (			\
	(__v64qi)(__m512i)(A), (__v64qi)(__m512i)(B), (int)(C)))
#define _mm512_mask_gf2p8affine_epi64_epi8(A, B, C, D, E)		    \
  ((__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask((__v64qi)(__m512i)(C),\
     (__v64qi)(__m512i)(D), (int)(E), (__v64qi)(__m512i)(A), (__mmask64)(B)))
#define _mm512_maskz_gf2p8affine_epi64_epi8(A, B, C, D)			    \
  ((__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask((__v64qi)(__m512i)(B),\
	 (__v64qi)(__m512i)(C), (int)(D),				    \
	 (__v64qi)(__m512i) _mm512_setzero_si512 (), (__mmask64)(A)))
#define _mm512_gf2p8affine_epi64_epi8(A, B, C)				    \
  ((__m512i) __builtin_ia32_vgf2p8affineqb_v64qi ((__v64qi)(__m512i)(A),    \
	 (__v64qi)(__m512i)(B), (int)(C)))
#endif

#ifdef __DISABLE_GFNIAVX512FBW__
#undef __DISABLE_GFNIAVX512FBW__
#pragma GCC pop_options
#endif /* __GFNIAVX512FBW__ */

#endif /* _GFNIINTRIN_H_INCLUDED */

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