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ðŸ“„ a.out.h(756 B)
ðŸ“„ amd_hsmp.h(8.68 KB)
ðŸ“„ auxvec.h(618 B)
ðŸ“„ bitsperlong.h(321 B)
ðŸ“„ boot.h(323 B)
ðŸ“„ bootparam.h(7.58 KB)
ðŸ“„ bpf_perf_event.h(40 B)
ðŸ“„ byteorder.h(176 B)
ðŸ“„ debugreg.h(3.25 KB)
ðŸ“„ e820.h(2.52 KB)
ðŸ“„ errno.h(31 B)
ðŸ“„ fcntl.h(31 B)
ðŸ“„ hw_breakpoint.h(69 B)
ðŸ“„ hwcap2.h(270 B)
ðŸ“„ ioctl.h(31 B)
ðŸ“„ ioctls.h(32 B)
ðŸ“„ ipcbuf.h(32 B)
ðŸ“„ ist.h(854 B)
ðŸ“„ kvm.h(11.44 KB)
ðŸ“„ kvm_para.h(4.24 KB)
ðŸ“„ kvm_perf.h(388 B)
ðŸ“„ ldt.h(1.28 KB)
ðŸ“„ mce.h(1.65 KB)
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ðŸ“„ msgbuf.h(1.03 KB)
ðŸ“„ msr.h(346 B)
ðŸ“„ mtrr.h(4.13 KB)
ðŸ“„ param.h(31 B)
ðŸ“„ perf_regs.h(1.37 KB)
ðŸ“„ poll.h(30 B)
ðŸ“„ posix_types.h(224 B)
ðŸ“„ posix_types_32.h(765 B)
ðŸ“„ posix_types_64.h(609 B)
ðŸ“„ posix_types_x32.h(581 B)
ðŸ“„ prctl.h(618 B)
ðŸ“„ processor-flags.h(6.47 KB)
ðŸ“„ ptrace-abi.h(1.99 KB)
ðŸ“„ ptrace.h(1.46 KB)
ðŸ“„ resource.h(34 B)
ðŸ“„ sembuf.h(1.02 KB)
ðŸ“„ setup.h(6 B)
ðŸ“„ sgx.h(8.15 KB)
ðŸ“„ shmbuf.h(1.23 KB)
ðŸ“„ sigcontext.h(9.5 KB)
ðŸ“„ sigcontext32.h(247 B)
ðŸ“„ siginfo.h(422 B)
ðŸ“„ signal.h(2.83 KB)
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ðŸ“„ svm.h(9.54 KB)
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ðŸ“„ termbits.h(34 B)
ðŸ“„ termios.h(33 B)
ðŸ“„ types.h(152 B)
ðŸ“„ ucontext.h(2.07 KB)
ðŸ“„ unistd.h(359 B)
ðŸ“„ unistd_32.h(10.87 KB)
ðŸ“„ unistd_64.h(9.1 KB)
ðŸ“„ unistd_x32.h(16.03 KB)
ðŸ“„ vm86.h(3.04 KB)
ðŸ“„ vmx.h(7.2 KB)
ðŸ“„ vsyscall.h(263 B)

Editing: perf_regs.h

/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef _ASM_X86_PERF_REGS_H
#define _ASM_X86_PERF_REGS_H

enum perf_event_x86_regs {
	PERF_REG_X86_AX,
	PERF_REG_X86_BX,
	PERF_REG_X86_CX,
	PERF_REG_X86_DX,
	PERF_REG_X86_SI,
	PERF_REG_X86_DI,
	PERF_REG_X86_BP,
	PERF_REG_X86_SP,
	PERF_REG_X86_IP,
	PERF_REG_X86_FLAGS,
	PERF_REG_X86_CS,
	PERF_REG_X86_SS,
	PERF_REG_X86_DS,
	PERF_REG_X86_ES,
	PERF_REG_X86_FS,
	PERF_REG_X86_GS,
	PERF_REG_X86_R8,
	PERF_REG_X86_R9,
	PERF_REG_X86_R10,
	PERF_REG_X86_R11,
	PERF_REG_X86_R12,
	PERF_REG_X86_R13,
	PERF_REG_X86_R14,
	PERF_REG_X86_R15,
	/* These are the limits for the GPRs. */
	PERF_REG_X86_32_MAX = PERF_REG_X86_GS + 1,
	PERF_REG_X86_64_MAX = PERF_REG_X86_R15 + 1,

/* These all need two bits set because they are 128bit */
	PERF_REG_X86_XMM0  = 32,
	PERF_REG_X86_XMM1  = 34,
	PERF_REG_X86_XMM2  = 36,
	PERF_REG_X86_XMM3  = 38,
	PERF_REG_X86_XMM4  = 40,
	PERF_REG_X86_XMM5  = 42,
	PERF_REG_X86_XMM6  = 44,
	PERF_REG_X86_XMM7  = 46,
	PERF_REG_X86_XMM8  = 48,
	PERF_REG_X86_XMM9  = 50,
	PERF_REG_X86_XMM10 = 52,
	PERF_REG_X86_XMM11 = 54,
	PERF_REG_X86_XMM12 = 56,
	PERF_REG_X86_XMM13 = 58,
	PERF_REG_X86_XMM14 = 60,
	PERF_REG_X86_XMM15 = 62,

/* These include both GPRs and XMMX registers */
	PERF_REG_X86_XMM_MAX = PERF_REG_X86_XMM15 + 2,
};

#define PERF_REG_EXTENDED_MASK	(~((1ULL << PERF_REG_X86_XMM0) - 1))

#endif /* _ASM_X86_PERF_REGS_H */

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Editing: perf_regs.h

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