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__init__.py
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__pycache__
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setup_switch_x64_masm.cmd
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switch_aarch64_gcc.h
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switch_alpha_unix.h
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switch_amd64_unix.h
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switch_arm32_gcc.h
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switch_arm32_ios.h
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switch_arm64_masm.asm
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switch_arm64_masm.obj
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switch_arm64_msvc.h
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switch_csky_gcc.h
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switch_loongarch64_linux.h
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switch_m68k_gcc.h
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switch_mips_unix.h
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switch_ppc64_aix.h
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switch_ppc64_linux.h
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switch_ppc_aix.h
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switch_ppc_linux.h
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switch_ppc_macosx.h
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switch_ppc_unix.h
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switch_riscv_unix.h
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switch_s390_unix.h
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switch_sh_gcc.h
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switch_sparc_sun_gcc.h
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switch_x32_unix.h
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switch_x64_masm.asm
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switch_x64_masm.obj
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switch_x64_msvc.h
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switch_x86_msvc.h
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switch_x86_unix.h
(2.99 KB)
Editing: switch_riscv_unix.h
#define STACK_REFPLUS 1 #ifdef SLP_EVAL #define STACK_MAGIC 0 #define REGS_TO_SAVE "s1", "s2", "s3", "s4", "s5", \ "s6", "s7", "s8", "s9", "s10", "s11", "fs0", "fs1", \ "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", "fs8", "fs9", \ "fs10", "fs11" static int slp_switch(void) { int ret; long fp; long *stackref, stsizediff; __asm__ volatile ("" : : : REGS_TO_SAVE); __asm__ volatile ("mv %0, fp" : "=r" (fp) : ); __asm__ volatile ("mv %0, sp" : "=r" (stackref) : ); { SLP_SAVE_STATE(stackref, stsizediff); __asm__ volatile ( "add sp, sp, %0\n\t" "add fp, fp, %0\n\t" : /* no outputs */ : "r" (stsizediff) ); SLP_RESTORE_STATE(); } __asm__ volatile ("" : : : REGS_TO_SAVE); #if __riscv_xlen == 32 __asm__ volatile ("lw fp, %0" : : "m" (fp)); #else __asm__ volatile ("ld fp, %0" : : "m" (fp)); #endif __asm__ volatile ("mv %0, zero" : "=r" (ret) : ); return ret; } #endif
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